Awny, Ahmed Sanaa Ahmed: Design and measurement techniques for decision feedback equalizers up to 110Gb/s in SiGe technologies. 2015
Content
- Contents
- List of Figures
- List of Tables
- 1 Introduction
- 1.1 Transmission Impairments in Optical Fibers
- 1.2 Feedforward versus Feedback Equalization
- 1.3 Chip-to-Chip and Board-to-Board Applications
- 1.4 Motivation
- 1.5 Organization of the Thesis
- 2 Decision Feedback Equalizer Architectures
- 3 Active and Passive Components for the Proposed DFE
- 3.1 Design of the DFE Broadband Front-end
- 3.1.1 Bandwidth Requirement
- 3.1.2 Design and Characterization of the First Version of the DFE Front-end
- 3.1.3 Design and Characterization of the Second Version of the DFE Front-end
- 3.2 Static Frequency Dividers
- 3.3 Design of Broadband Clock Distribution Network
- 3.4 Generating Differential Signals from Single-ended CW Sources
- 4 Design and Testing of the Proposed DFE for 80 and 110 Gb/s
- 4.1 Integrating the Components
- 4.2 Measurement Techniques
- 4.2.1 Measuring the Maximum Operating Bit Rate of the Combinational Logic
- 4.2.2 Measuring the Maximum Operating Frequency of the Feedback Loop
- 4.3 Measurement at the Full Bit Rate
- 4.4 Design and On-wafer Measurement of a 110 Gb/s DFE
- 4.5 Comparison with State of the Art in DFEs
- 5 Conclusion and Outlook
- Appendix A Fabrication Technology
- Appendix B Deembedding
- Appendix C Small Signal Voltage Gain and S-parameters
- References
- List of Publication