Content

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   List of Figures
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   List of Tables
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   List of Algorithms
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   List of Symbols
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   1 Introduction
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   1.1 Motivation
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   1.2 Thesis Goals
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   1.3 Thesis Contributions
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   1.4 Thesis Outline
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  2 Background
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   2.1 Embedded System Design
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   2.2 Reconfigurable Computing Overview
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   2.2.1 Coupling CPU and Reconfigurable Hardware
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   2.2.2 Reconfigurable System Design
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   2.3 Reconfigurable Hardware Technology
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   2.3.1 Hybrid Architecture
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   2.3.2 Configuration Techniques
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   2.3.3 Partial Reconfiguration Feature
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   2.4 Chapter Conclusions
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  3 Related Work Survey
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   3.1 (Re)Configurable Operating Systems
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   3.1.1 Statically Reconfigurable OS
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   3.1.2 Dynamically Reconfigurable OS: Application Triggered
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   3.1.3 Dynamically Reconfigurable OS: System Triggered
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   3.1.4 Towards Online Reconfigurable DREAMS
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   3.1.5 Further Comments
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   3.2 Operating System for Reconfigurable Computing
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   3.2.1 Low-level OS Support for Reconfigurable Hardware
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   3.2.2 Application Model
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   3.2.3 OS Services for Reconfigurable Hardware
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   3.2.4 RTOS issues in High Level Design
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   3.2.5 Offline Approaches
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   3.2.6 Run-time Support
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   3.2.7 Multitasking Issues
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   3.2.8 Dynamically Hybrid Architectures
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  3.3 Further Approaches
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   3.3.1 Hardware Accelerator for RTOS
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   3.3.2 Multithreading on Hybrid Architectures
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  3.4 Chapter Conclusions
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   3.4.1 Correlation With This Thesis
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   3.4.2 Additional Comments
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  4 Run-time Reconfigurable RTOS
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   4.1 System Overview
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   4.1.1 Target Applications
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   4.1.2 Target RTOS
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   4.1.3 Instrumented OS API
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   4.1.4 Run-time Reconfiguration Manager - RRM
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   4.2 Hardware Architecture
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   4.3 Design Support
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   4.4 Chapter Conclusions
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  5 Modeling & Problem Formulation
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   5.1 Component Assignment
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   5.1.1 Constraints Definition
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   5.1.2 Objective Function Definition
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   5.1.3 Allocation Example
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   5.2 Reconfiguration Costs
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   5.2.1 Temporal Specification
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   5.3 Communication Costs
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   5.4 Chapter Conclusions
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  6 Run-Time Methods
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   6.1 OS Service Allocation
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   6.1.1 OS Service Assignment Phase
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   6.1.2 OS Service Assignment Example
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   6.1.3 Balance B Improvement Phase
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   6.1.4 Balance B Improvement Example
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   6.1.5 Reconfiguration Cost Reduction
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   6.2 Communication-aware Allocation Algorithm
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   6.3 Handling Reconfiguration Activities
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   6.4 OS Component Reconfiguration
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   6.4.1 Applying Total Bandwidth Server
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   6.4.2 Deriving Migration Conditions
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   6.4.3 Software to Hardware Migration
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   6.4.4 Hardware to Software Migration
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   6.4.5 Software Service Reconfiguration
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   6.4.6 Hardware Service Reconfiguration
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   6.4.7 Migrating by Preempting
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   6.5 Schedulability Analysis
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   6.6 OS Components Scheduling
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   6.6.1 Partial Schedule
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   6.6.2 Complete Schedule
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   6.7 Chapter Conclusions
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  7 Methods Evaluation
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  7.1 OS Components Allocation
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   7.1.1 OS Components Assignment
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   7.2 Balancing Heuristic
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   7.2.1 Reconfiguration Cost Reduction
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   7.3 Components Reconfiguration Scheduling
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   7.4 Communication costs reduction
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   7.5 Chapter Conclusions
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   8 Design Support
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   8.1 Hardware-Software Interface Synthesis
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   8.1.1 OS Driver Extension
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   8.1.2 Software Interface for Reconfigurable IPs
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   8.1.3 Integration into IFS Tool
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   8.1.4 Further Extension for DREAMS
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   8.2 Relocatable Tasks Design
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   8.2.1 Unified Task Representation
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   8.2.2 A Framework for Relocatable Task Design
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   8.3 Chapter Conclusions
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  9 Case Study
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   9.1 Target OS Service
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   9.2 Relocatable Triple-DES
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   9.3 Testbed Set Up
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   9.4 Quantitative Results
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   9.5 Chapter Conclusions
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  10 Conclusion & Outlook
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   10.1 Summary
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   10.2 Outlook
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   A Further Evaluation Results
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   B HW/SW Interface Generation
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  C Hardware/Software Task Design
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   C.1 Hardware Task Controller Template
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   C.2 Sequence Graphs for Two Migration Cases
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   D TBS Server Bandwidth Estimation