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Run-time reconfigurable RTOS for reconfigurable systems-on-chip / Marcelo Götz. 2007
Inhalt
List of Figures
List of Tables
List of Algorithms
List of Symbols
1 Introduction
1.1 Motivation
1.2 Thesis Goals
1.3 Thesis Contributions
1.4 Thesis Outline
2 Background
2.1 Embedded System Design
2.2 Reconfigurable Computing Overview
2.2.1 Coupling CPU and Reconfigurable Hardware
2.2.2 Reconfigurable System Design
2.3 Reconfigurable Hardware Technology
2.3.1 Hybrid Architecture
2.3.2 Configuration Techniques
2.3.3 Partial Reconfiguration Feature
2.4 Chapter Conclusions
3 Related Work Survey
3.1 (Re)Configurable Operating Systems
3.1.1 Statically Reconfigurable OS
3.1.2 Dynamically Reconfigurable OS: Application Triggered
3.1.3 Dynamically Reconfigurable OS: System Triggered
3.1.4 Towards Online Reconfigurable DREAMS
3.1.5 Further Comments
3.2 Operating System for Reconfigurable Computing
3.2.1 Low-level OS Support for Reconfigurable Hardware
3.2.2 Application Model
3.2.3 OS Services for Reconfigurable Hardware
3.2.4 RTOS issues in High Level Design
3.2.5 Offline Approaches
3.2.6 Run-time Support
3.2.7 Multitasking Issues
3.2.8 Dynamically Hybrid Architectures
3.3 Further Approaches
3.3.1 Hardware Accelerator for RTOS
3.3.2 Multithreading on Hybrid Architectures
3.4 Chapter Conclusions
3.4.1 Correlation With This Thesis
3.4.2 Additional Comments
4 Run-time Reconfigurable RTOS
4.1 System Overview
4.1.1 Target Applications
4.1.2 Target RTOS
4.1.3 Instrumented OS API
4.1.4 Run-time Reconfiguration Manager - RRM
4.2 Hardware Architecture
4.3 Design Support
4.4 Chapter Conclusions
5 Modeling & Problem Formulation
5.1 Component Assignment
5.1.1 Constraints Definition
5.1.2 Objective Function Definition
5.1.3 Allocation Example
5.2 Reconfiguration Costs
5.2.1 Temporal Specification
5.3 Communication Costs
5.4 Chapter Conclusions
6 Run-Time Methods
6.1 OS Service Allocation
6.1.1 OS Service Assignment Phase
6.1.2 OS Service Assignment Example
6.1.3 Balance B Improvement Phase
6.1.4 Balance B Improvement Example
6.1.5 Reconfiguration Cost Reduction
6.2 Communication-aware Allocation Algorithm
6.3 Handling Reconfiguration Activities
6.4 OS Component Reconfiguration
6.4.1 Applying Total Bandwidth Server
6.4.2 Deriving Migration Conditions
6.4.3 Software to Hardware Migration
6.4.4 Hardware to Software Migration
6.4.5 Software Service Reconfiguration
6.4.6 Hardware Service Reconfiguration
6.4.7 Migrating by Preempting
6.5 Schedulability Analysis
6.6 OS Components Scheduling
6.6.1 Partial Schedule
6.6.2 Complete Schedule
6.7 Chapter Conclusions
7 Methods Evaluation
7.1 OS Components Allocation
7.1.1 OS Components Assignment
7.2 Balancing Heuristic
7.2.1 Reconfiguration Cost Reduction
7.3 Components Reconfiguration Scheduling
7.4 Communication costs reduction
7.5 Chapter Conclusions
8 Design Support
8.1 Hardware-Software Interface Synthesis
8.1.1 OS Driver Extension
8.1.2 Software Interface for Reconfigurable IPs
8.1.3 Integration into IFS Tool
8.1.4 Further Extension for DREAMS
8.2 Relocatable Tasks Design
8.2.1 Unified Task Representation
8.2.2 A Framework for Relocatable Task Design
8.3 Chapter Conclusions
9 Case Study
9.1 Target OS Service
9.2 Relocatable Triple-DES
9.3 Testbed Set Up
9.4 Quantitative Results
9.5 Chapter Conclusions
10 Conclusion & Outlook
10.1 Summary
10.2 Outlook
A Further Evaluation Results
B HW/SW Interface Generation
C Hardware/Software Task Design
C.1 Hardware Task Controller Template
C.2 Sequence Graphs for Two Migration Cases
D TBS Server Bandwidth Estimation
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