Inhalt

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  Introduction
•  
   Motivation
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   Objectives
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   Problem Statement
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   Contributions
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   Organization of the Dissertation
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  Background
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   Real-Time Systems and Scheduling
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   Run-Time Energy Management Techniques
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   Dynamic Power Management (DPM)
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   Dynamic Voltage and Frequency Scaling (DVS)
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   Interplay of DPM and DVS
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   DPM and DVS on Multi-Core Processor Platforms
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   Energy Efficient Real-Time Scheduling
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   Advanced Configuration & Power Interface
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   Chapter Summary
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  System Models and Problem Formulation
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   Processor Power Model
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   Single-Core Processor
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   Multi-Core Processor
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   Device Power Model
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   Real-Time Task Model
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   Problem Formulation
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   Problem for Single-Core Processor Platforms (RTSC)
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   Problem for Multi-Core Processor Platforms (RTMC)
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   Chapter Summary
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  Guided Search Algorithm based on Simulated Annealing
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   Introduction
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   The HSASC Algorithm for RTSC
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   The HSAMC Algorithm for RTMC
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   Chapter Summary
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  Run-Time Behavior Analysis
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   Introduction
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   Run-Time Behavior Analysis through Exponential Regression
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   Quality Estimation
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   Termination Criterion
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   Chapter Summary
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  ES-AS: An Online Approach
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   Motivation
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   Overview of ES-AS Approach
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  ES-AS Approach for RTSC
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   Exploration Stage
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   Application Stage
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   Correctness and Complexity
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  ES-AS Approach for RTMC
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   Exploration Stage
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   Application Stage
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   Correctness and Complexity
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   Chapter Summary
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  Consideration of Non-Negligible DVS State Switching Overhead
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   Introduction
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  DVS Overhead Handling for RTSC
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   Problem Description
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   Enhanced Schedulability Analysis
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  DVS Overhead Handling for RTMC
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   Problem Description
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   Enhanced Schedulability Analysis
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   Chapter Summary
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  Evaluation
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   Objectives
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  Synthetic Test Scenarios
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   Abstract RTOS Simulation Framework
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   Generation of Synthetic Task Sets
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   Energy Reduction Efficiency (Static Slack)
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   Energy Reduction Efficiency (Dynamic Slack)
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   Run-Time Analysis
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   Estimation Accuracy
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   ES-AS Run-Time Overhead
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   Impact of CP and SIP
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  Real-Life Case Studies
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   Single-Core Processor Platform: BeagleBoard
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   Multi-Core Processor Platform: Intel Core 2 Duo Processor
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   Chapter Summary
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  Conclusion and Future Work
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   Conclusion
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   Open Issues and Future Work
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   Appendices
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  Additional Evaluation Results
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   Energy Reduction Efficiency (Static Slack)
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   Energy Reduction Efficiency (Dynamic Slack)
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   Run-Time Analysis
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   List of Figures
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   List of Tables
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   List of Algorithms
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   List of Abbreviations
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   List of Symbols
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   Bibliography