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- Approaching system level designIn: VHDL for simulation, synthesis and formal proofs of hardware, Jg. 1992, S. 259-276 
- A concept for the editing of hardware resulting in an automatic hardware editorIn: 14th Design Automation Conference, New Orleans, Jg. 1977, S. 187-193 
- The concurrent programming language CAP and the -processor oriented CAP CAD-systemIn: Microprocessors and their applications / Symposium on Microprocessing and Microprogramming <5, 1979, Göteborg>, Jg. 1979, S. 249-258 
- Design aids for highly distributed hardwareIn: Concurrent languages in distributed systems / Workshop on Hardware Supported Implementation on Concurrent Languages in Distributed Systems <1984, Bristol>, Jg. 1985, S. 135-149 
- DIGITEST II : an integrated structural and behavioural languageIn: International Symposium on Computer Hardware Description Languages and their Applications, New York, 3, Jg. 1975, S. 38-44 
- DIGITEST: a structural language based on algebraic models of the logic topology and the time behaviour of digital circuitsIn: Proceedings of 2nd Workshop on Computer Hardware Description Languages, Darmstadt, Jul. 1974, Jg. 1974, S. 126-128 
- Five valued quasi Boolean functionsIn: Fifth European Meeting on Cybernetics and Systems Research / European Meeting on Cybernetics and Systems Research <5, 1980, Wien>, Jg. 35.1980, S. 2-5 
- The hardware description language DACAPO IIIIn: Fundamentals and standards in hardware description languages, Jg. 1993, S. 395-409 
- Hierarchical modular description of VLSI systemsIn: Workshop report / VLSI and Software Engineering Workshop <1982, Port Chester, NY>, Jg. 1983, S. 112-116 
- The implementation of the computer hardware description language CAP and its applicationsIn: Proceedings / International Symposium on Hardware Description Languages and their Applications <1979, Palo Alto, CA>, Jg. 1979, S. 138-144 
- Mixed level modelling and simulation of VLSI systemsIn: Logic design and simulation, Jg. 1986, S. 95-134 
- Modelling aspects of system level designIn: Proceedings / EURO-DAC '93, Jg. 1993, S. 534-539 
- A multilevel cybernetic model of the design processIn: Methodologies for computer system design / Working Conference on Methodologies for Computer System Design <1983, Lille>, Jg. 1985, S. 87-103 
- Multilevel simulation techniquesIn: VLSI and computers / First International Conference on Computer Technology, Systems and Applications, Hamburg, May 11-15, 1987, COMPEURO 87, Jg. 1.1987, S. 188-192 
- Structured parallel programming with a highly concurrent programming languageIn: Atti del Congresso dell'AICA / Associazione Italiana per il Calcolo Automatico, Jg. 1980, S. 279-294 
- Synthesis related aspects of simulationIn: The synthesis approach to digital system design, Jg. 1992, S. 303-334 
- System level designIn: Fundamentals and standards in hardware description languages, Jg. 1993, S. 109-151 
